发明授权
US08039898B2 Process for manufacturing a charge-balance power diode and an edge-termination structure for a charge-balance semiconductor power device
有权
用于制造电荷平衡功率二极管的工艺和用于电荷平衡半导体功率器件的边缘终端结构
- 专利标题: Process for manufacturing a charge-balance power diode and an edge-termination structure for a charge-balance semiconductor power device
- 专利标题(中): 用于制造电荷平衡功率二极管的工艺和用于电荷平衡半导体功率器件的边缘终端结构
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申请号: US11824169申请日: 2007-06-28
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公开(公告)号: US08039898B2公开(公告)日: 2011-10-18
- 发明人: Mario Giuseppe Saggio , Domenico Murabito , Ferruccio Frisina
- 申请人: Mario Giuseppe Saggio , Domenico Murabito , Ferruccio Frisina
- 申请人地址: IT Agrate Brianza
- 专利权人: STMicroelectronics, S.r.l.
- 当前专利权人: STMicroelectronics, S.r.l.
- 当前专利权人地址: IT Agrate Brianza
- 代理机构: Graybeal Jackson LLP
- 代理商 Lisa K. Jorgenson; Kevin D. Jablonski
- 优先权: EP06425448 20060628
- 主分类号: H01L29/66
- IPC分类号: H01L29/66
摘要:
An embodiment of a process for manufacturing a semiconductor power device envisages the steps of: providing a body made of semiconductor material having a first top surface; forming an active region with a first type of conductivity in the proximity of the first top surface and inside an active portion of the body; and forming an edge-termination structure. The edge-termination structure is formed by: a ring region having the first type of conductivity and a first doping level, set within a peripheral edge portion of the body and electrically coupled to the active region; and a guard region, having the first type of conductivity and a second doping level, higher than the first doping level, set in the proximity of the first top surface and connecting the active region to the ring region. The process further envisages the steps of: forming a surface layer having the first type of conductivity on the first top surface, also at the peripheral edge portion, in contact with the guard region; and etching the surface layer in order to remove it above the edge portion in such a manner that the etch terminates inside the guard region.
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