An array substrate for a liquid crystal display device, including: a substrate; a gate line on the substrate; a data line crossing the gate line to define a pixel region; a thin film transistor connected to the gate line and the data line, the thin film transistor including a gate electrode connected to the gate line, a semiconductor layer whose boundary is within the gate electrode, a source electrode connected to the data line and a drain electrode spaced apart from the source electrode; a passivation pattern covering the data line and the thin film transistor; and a pixel electrode extending from the drain electrode.