A flash memory device includes a plurality of memory cell blocks, an operating voltage generator, a block switching unit and a voltage supply circuit. Each of the plurality of memory cell blocks includes select lines and word lines, and has pass word lines included between the select lines and the word lines. The operating voltage generator outputs operating voltages to global select lines, global word lines and global pass word lines. The block switching unit connects the global word lines to the word lines and the select lines in response to a block select signal. The voltage supply circuit is connected to the select line and the pass word line, and is configured to supply the select line and the pass word line with a ground voltage in response to a block select inverse signal.