发明授权
US08046569B2 Processing element having dual control stores to minimize branch latency
有权
具有双重控制存储器的处理元件以最小化分支延迟
- 专利标题: Processing element having dual control stores to minimize branch latency
- 专利标题(中): 具有双重控制存储器的处理元件以最小化分支延迟
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申请号: US11796810申请日: 2007-04-30
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公开(公告)号: US08046569B2公开(公告)日: 2011-10-25
- 发明人: Michael L. Ziegler
- 申请人: Michael L. Ziegler
- 申请人地址: US TX Houston
- 专利权人: Hewlett-Packard Development Company, L.P.
- 当前专利权人: Hewlett-Packard Development Company, L.P.
- 当前专利权人地址: US TX Houston
- 主分类号: G06F9/00
- IPC分类号: G06F9/00
摘要:
Embodiments involve an embedded processing element that fetches at least two possible next instructions (control words) in parallel in one cycle, and executes one of them during the following cycle based on the result of a conditional branch test. Embodiments reduce or avoid branch penalties (zero penalty branches).
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