A method for testing a digital to analog converter, which operates in an undersampling environment, wherein signals of a tested DAC and a signal generator are modulated by a PWM device and then processed by a digital processing circuit to generate a digital signal, whereby is formed a low-speed equivalent ADC. The signal generator is provided by uniform-distribution random test patterns, and the signal generator generates an uniform-distribution random analog signal to the equivalent ADC. Thereby, the test error caused by the non-ideality of the signal generator is corrected, and the tested circuit can work in a full speed.