发明授权
US08051268B2 Memory controller, nonvolatile storage device, nonvolatile storage system, and nonvolatile memory address management method
失效
内存控制器，非易失性存储设备，非易失性存储系统和非易失性存储器地址管理方法
- 专利标题： Memory controller, nonvolatile storage device, nonvolatile storage system, and nonvolatile memory address management method
- 专利标题（中）： 内存控制器，非易失性存储设备，非易失性存储系统和非易失性存储器地址管理方法
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申请号： US11814202申请日： 2006-07-21
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公开(公告)号： US08051268B2公开(公告)日： 2011-11-01
- 发明人: Masahiro Nakanishi , Tetsushi Kasahara , Tomoaki Izumi , Kiminori Matsuno , Daisuke Kunimune , Kazuaki Tamura , Yoshiyuki Konishi
- 申请人： Masahiro Nakanishi , Tetsushi Kasahara , Tomoaki Izumi , Kiminori Matsuno , Daisuke Kunimune , Kazuaki Tamura , Yoshiyuki Konishi
- 申请人地址： JP Osaka
- 专利权人： Panasonic Corporation
- 当前专利权人： Panasonic Corporation
- 当前专利权人地址： JP Osaka
- 代理机构： Greenblum & Bernstein, P.L.C.
- 优先权： JP2005-219958 20050729; JP2005-331060 20051116
- 国际申请： PCT/JP2006/314496 WO 20060721
- 国际公布： WO2007/013372 WO 20070201
- 主分类号： G06F12/00
- IPC分类号： G06F12/00
摘要：
For address management of a nonvolatile memory, the whole logical address space is divided into logical address ranges (0 to 15), and the physical address space is divided into physical areas (segments (0 to 15)). The logical address ranges are respectively associated with the physical areas (segments) to manage the addresses. The sizes of the logical address ranges are equalized. The size of the physical area (segment (0)) corresponding to the logical address range (0) in which data of high rewrite frequency such as an FAT is expected to be stored is larger than those of the other physical areas, and the logical address ranges and the physical areas are allocated. Alternatively, the sizes of the physical areas are equalized, and the size of the logical address range (0) is set as a smaller one than those of the other logical address ranges. With this, the actual rewrite frequencies of the physical areas (segments) are equal to one another, and consequently the life of the nonvolatile memory can be prolonged.