Invention Grant
US08053301B2 CMOS SiGe channel pFET and Si channel nFET devices with minimal STI recess
有权
CMOS SiGe沟道pFET和Si沟道nFET器件，具有最小的STI凹陷
- Patent Title: CMOS SiGe channel pFET and Si channel nFET devices with minimal STI recess
- Patent Title (中): CMOS SiGe沟道pFET和Si沟道nFET器件，具有最小的STI凹陷
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Application No.: US12413771Application Date: 2009-03-30
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Publication No.: US08053301B2Publication Date: 2011-11-08
- Inventor: Daniel J. Jaeger , Michael V. Aquilino , Christopher V. Baiocco
- Applicant: Daniel J. Jaeger , Michael V. Aquilino , Christopher V. Baiocco
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Joseph Petrokaiti
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L21/20
Abstract:
Silicon germanium (SiGe) is epitaxially grown on a silicon channel above nFET and pFET regions of a substrate. SiGe is removed above the nFET regions. A device includes a silicon channel above the nFET regions and a SiGe channel above the pFET regions.
Public/Granted literature
- US20100244198A1 CMOS SIGE CHANNEL PFET AND SI CHANNEL NFET DEVICES WITH MINIMAL STI RECESS Public/Granted day:2010-09-30
Information query
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