发明授权
US08067285B2 Methods of forming a conductive layer structure and methods of manufacturing a recessed channel transistor including the same
失效
形成导电层结构的方法以及制造包括该沟道晶体管的凹陷沟道晶体管的方法
- 专利标题: Methods of forming a conductive layer structure and methods of manufacturing a recessed channel transistor including the same
- 专利标题(中): 形成导电层结构的方法以及制造包括该沟道晶体管的凹陷沟道晶体管的方法
-
申请号: US12968711申请日: 2010-12-15
-
公开(公告)号: US08067285B2公开(公告)日: 2011-11-29
- 发明人: Jong-Chul Park , Chan-Mi Lee , Sang-Sup Jeong
- 申请人: Jong-Chul Park , Chan-Mi Lee , Sang-Sup Jeong
- 申请人地址: KR Suwon-si, Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Suwon-si, Gyeonggi-do
- 代理机构: Lee & Morse, P.C.
- 优先权: KR10-2009-0125821 20091217
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L29/66
摘要:
In a method of forming a conductive layer structure and a method of manufacturing a recess channel transistor, a first insulating layer and a first conductive layer are sequentially formed on a substrate having a first region a second region and the substrate is exposed in a recess-forming area in the first region. A recess is formed in the recess-forming-area by etching the exposed region of the substrate. A second insulating layer is conformally formed on a sidewall and a bottom of the recess. A second conductive layer pattern is formed on the second insulating layer to fill up a portion of the recess. A spacer is formed on the second conductive layer pattern and on the second insulating layer on the sidewall of the recess. A third conductive layer pattern is formed on the second conductive layer pattern and the spacer to fill up the recess.
公开/授权文献
信息查询
IPC分类: