Invention Grant
- Patent Title: Semiconductor device, semiconductor package, and method for testing semiconductor device
- Patent Title (中): 半导体器件，半导体封装和半导体器件测试方法
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Application No.: US11124262Application Date: 2005-05-09
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Publication No.: US08080873B2Publication Date: 2011-12-20
- Inventor: Hiroyuki Tanaka , Yoshito Ito , Akinori Sekiyama
- Applicant: Hiroyuki Tanaka , Yoshito Ito , Akinori Sekiyama
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Arent Fox LLP
- Priority: JP2002-187994 20020627
- Main IPC: H01L23/34
- IPC: H01L23/34
Abstract:
A semiconductor device designed to facilitate testing. Superimposed first and second semiconductor chips each include a plurality of internal terminals, an external terminal, and a plurality of transistors. A plurality of wires connect the internal terminals, the transistors, and the external terminals of the first and second semiconductor chips in series.
Public/Granted literature
- US20050200005A1 Semiconductor device, semiconductor package, and method for testing semiconductor device Public/Granted day:2005-09-15
Information query
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