发明授权
US08082139B1 Displaying signals of a design block emulated in hardware co-simulation 有权
显示在硬件协同仿真中仿真的设计块的信号

  • 专利标题: Displaying signals of a design block emulated in hardware co-simulation
  • 专利标题(中): 显示在硬件协同仿真中仿真的设计块的信号
  • 申请号: US11729400
    申请日: 2007-03-27
  • 公开(公告)号: US08082139B1
    公开(公告)日: 2011-12-20
  • 发明人: Jonathan B. BallaghMichael D. Hirsch
  • 申请人: Jonathan B. BallaghMichael D. Hirsch
  • 申请人地址: US CA San Jose
  • 专利权人: Xilinx, Inc.
  • 当前专利权人: Xilinx, Inc.
  • 当前专利权人地址: US CA San Jose
  • 代理商 LeRoy D. Maunu; Lois D. Cartier
  • 主分类号: G06F17/50
  • IPC分类号: G06F17/50
Displaying signals of a design block emulated in hardware co-simulation
摘要:
Methods and systems for simulating an electronic system in a high level modeling system (HLMS). A design block and certain signals of the electronic system are selected. The selected signals include internal signals of the design block that are not ports of the design block. The electronic system is simulated in the HLMS, which includes a hardware-based co-simulation platform and a software-based co-simulation platform. A hardware realization of the design block is automatically generated and the design block is emulated in the hardware based co-simulation platform using the hardware realization of the design block. A sequence of values is displayed for the selected signals of the electronic system. During the simulation of the electronic system in the HLMS, the sequence of values for the internal signals of the design block and another sequence of values for the ports of the design block are transferred between the co-simulation platforms.
信息查询
0/0