发明授权
- 专利标题: Digital to analog converter system and method with multi-level scrambling
- 专利标题(中): 数模转换器系统及方法具有多级扰频
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申请号: US12624413申请日: 2009-11-24
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公开(公告)号: US08085177B2公开(公告)日: 2011-12-27
- 发明人: John Jude O'Donnell , Frederick Carnegie Thompson
- 申请人: John Jude O'Donnell , Frederick Carnegie Thompson
- 申请人地址: SG Singapore
- 专利权人: MediaTek Singapore Pte. Ltd.
- 当前专利权人: MediaTek Singapore Pte. Ltd.
- 当前专利权人地址: SG Singapore
- 代理商 Winston Hsu; Scott Margo
- 主分类号: H03M1/66
- IPC分类号: H03M1/66
摘要:
Tri-level scrambling in a digital to analog converter system is achieved by, in response to a tri-level binary code input, disabling a negative data directed scrambler circuit when the input code is in the positive cycle portion, disabling a positive data directed scrambler circuit when the input code is in the negative cycle portion and disabling both scrambler circuits upon a zero input code for reducing low level distortion due to a reversal of current during crossover between those cycles.
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