发明授权
US08086916B2 System and method for running test and redundancy analysis in parallel
有权
并行运行测试和冗余分析的系统和方法
- 专利标题: System and method for running test and redundancy analysis in parallel
- 专利标题(中): 并行运行测试和冗余分析的系统和方法
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申请号: US12490657申请日: 2009-06-24
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公开(公告)号: US08086916B2公开(公告)日: 2011-12-27
- 发明人: Kristopher Kopel
- 申请人: Kristopher Kopel
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Knobbe Martens Olson & Bear LLP
- 主分类号: G11C29/00
- IPC分类号: G11C29/00
摘要:
A memory redundancy analyzing apparatus having a tester, a queue, and a redundancy analyzer is provided. The tester includes testing portions for different types of fails, and each of the testing portions performs multiple tests on the memory locations and outputs fail information for at least a part of the memory device. The queue stores the fail information. The redundancy analyzer processes the fails using the fail information and produces a plurality of repair solutions. The types of fails include must fails and sparse fails. The fail information is transmitted to the queue, and the fail information includes at least a part of the fail information for the entire memory device. The tester can operate asynchronously from the redundancy analyzer.
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