Invention Grant
- Patent Title: Pattern misalignment measurement method, program, and semiconductor device manufacturing method
- Patent Title (中): 图案偏移测量方法,程序和半导体器件制造方法
-
Application No.: US11785782Application Date: 2007-04-20
-
Publication No.: US08090192B2Publication Date: 2012-01-03
- Inventor: Tadashi Mitsui
- Applicant: Tadashi Mitsui
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP2006-117931 20060421
- Main IPC: G06K9/00
- IPC: G06K9/00

Abstract:
A pattern misalignment measurement method includes acquiring an inspection image of a composite pattern formed by superposing a plurality of kinds of element patterns on each other, acquiring reference images of at least two kinds of element patterns from reference images which are images of reference patterns of the plurality of kinds of element patterns, performing first matching of each of the acquired reference images with the inspection image, and outputting misalignment between the element patterns in the composite pattern on the basis of the result of the first matching.
Public/Granted literature
- US20070248258A1 Pattern misalignment measurement method, program, and semiconductor device manufacturing method Public/Granted day:2007-10-25
Information query