Apparatus and methods for optimizing the performance of programmable logic devices using multiple supply voltage

Invention Grant

US08103975B2 Apparatus and methods for optimizing the performance of programmable logic devices using multiple supply voltage 有权

Title translation: 使用多电源电压优化可编程逻辑器件的性能的装置和方法

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Patent Title: Apparatus and methods for optimizing the performance of programmable logic devices using multiple supply voltage
Patent Title (中): 使用多电源电压优化可编程逻辑器件的性能的装置和方法
Application No.: US12165664

Application Date: 2008-07-01
Publication No.: US08103975B2

Publication Date: 2012-01-24
Inventor: David Lewis , Vaughn Betz , Paul Leventis , Christopher Lane , Andy Lee , Jeffrey Watt , Timothy Vanderhoek
Applicant: David Lewis , Vaughn Betz , Paul Leventis , Christopher Lane , Andy Lee , Jeffrey Watt , Timothy Vanderhoek
Applicant Address: US CA San Jose
Assignee: Altera Corporation
Current Assignee: Altera Corporation
Current Assignee Address: US CA San Jose
Agency: Law Offices of Maximilian R. Peterson
Main IPC: G06F17/50
IPC: G06F17/50

Apparatus and methods for optimizing the performance of programmable logic devices using multiple supply voltage

Abstract:

A programmable logic device (PLD) includes first and second circuits. The first and second circuits are part of a user's design to be implemented using the PLD's resources. The first circuit is powered by a first supply voltage. The second circuit is powered by a second supply voltage. At least one of the first and second supply voltages is determined by a PLD computer-aided design (CAD) flow used to implement the user's design in the PLD.

Abstract(Chinese):

可编程逻辑器件（PLD）包括第一和第二电路。第一和第二电路是使用PLD资源实现的用户设计的一部分。第一个电路由第一个电源供电。第二电路由第二电源供电。第一和第二电源电压中的至少一个由用于在PLD中实现用户设计的PLD计算机辅助设计（CAD）流确定。

Public/Granted literature

US20080263490A1 APPARATUS AND METHODS FOR OPTIMIZING THE PERFORMANCE OF PROGRAMMABLE LOGIC DEVICES Public/Granted day:2008-10-23

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