发明授权
- 专利标题: Mechanism to restrict parallelization of loops
- 专利标题(中): 限制环路并行化的机制
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申请号: US11314456申请日: 2005-12-21
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公开(公告)号: US08104030B2公开(公告)日: 2012-01-24
- 发明人: Raul Esteban Silvera , Priya Unnikrishnan , Guansong Zhang
- 申请人: Raul Esteban Silvera , Priya Unnikrishnan , Guansong Zhang
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Yee & Associates, P.C.
- 代理商 Ayla A. Lari
- 主分类号: G06F9/44
- IPC分类号: G06F9/44 ; G06F9/45
摘要:
A computer implemented method, computer usable program code, and a system for parallelizing a loop. A parameter that will be used to limit parallelization of the loop is identified to limit parallelization of the loop. The parameter specifies a minimum number of loop iterations that a thread should execute. The parameter can be adjusted based on a parallel performance factor. A parallel performance factor is a factor that influences the performance of parallel code. A number of threads from a plurality of threads is selected for processing iterations of the loop based on the parameter. The number of threads is selected prior to execution of the first iteration of the loop.
公开/授权文献
- US20070169057A1 Mechanism to restrict parallelization of loops 公开/授权日:2007-07-19
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