发明授权
- 专利标题: Method for tracking delay locked loop clock
- 专利标题(中): 跟踪延迟锁定环时钟的方法
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申请号: US12717104申请日: 2010-03-03
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公开(公告)号: US08106692B2公开(公告)日: 2012-01-31
- 发明人: Chung-Zen Chen
- 申请人: Chung-Zen Chen
- 申请人地址: TW Hsinchu
- 专利权人: Elite Semiconductor Memory Technology Inc.
- 当前专利权人: Elite Semiconductor Memory Technology Inc.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Jianq Chyun IP Office
- 主分类号: H03L7/06
- IPC分类号: H03L7/06
摘要:
A method for tracking a delay locked loop (DLL) clock is described. An external clock signal is allowed to pass through delay cells of a DLL during a first period of the external clock signal when a transition edge of a track signal applied on the DLL occurs. Then, when a transition edge of a sensing signal applied on the DLL occurs at a start of a second period of the external clock signal, the external clock signal is inhibited to pass through the delay cells and the number of the delay cells through which the external signal pass during the first period of the external clock signal is counted. When a reset signal is asserted, a delay time of each delay cell is reset such that a ratio of the delay time to the period of the external clock signal is kept from 10% to 15%.
公开/授权文献
- US20110215850A1 METHOD FOR TRACKING DELAY LOCKED LOOP CLOCK 公开/授权日:2011-09-08
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