发明授权
- 专利标题: Method and apparatus for operational-level functional and degradation fault analysis
- 专利标题(中): 操作级功能和劣化故障分析的方法和装置
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申请号: US12753166申请日: 2010-04-02
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公开(公告)号: US08108728B2公开(公告)日: 2012-01-31
- 发明人: Dipankar Das , Partha P. Chakrabarti , Purnendu Sinha
- 申请人: Dipankar Das , Partha P. Chakrabarti , Purnendu Sinha
- 申请人地址: US MI Detroit IN West Bengal
- 专利权人: GM Global Technology Operations LLC,Indian Institute of Technology Kharagpur
- 当前专利权人: GM Global Technology Operations LLC,Indian Institute of Technology Kharagpur
- 当前专利权人地址: US MI Detroit IN West Bengal
- 代理机构: Quinn Law Group, PLLC
- 主分类号: G06F11/00
- IPC分类号: G06F11/00
摘要:
An apparatus and method are provided for analyzing fault tolerance of a system, and performing “what if?” analysis for various fault-tolerant system design options. The fault tolerance analysis approach handles logical failures and quality faults emanating from loss of precision in signal values. The method can detect quality faults, which can allow systems to be built which are resilient to precision losses. Two analysis steps are provided, one static and another simulation-based, which are used in tandem to check the fault tolerance of an automotive or other system. While a simulation-based method checks fault-resilience under specific test cases and fault-scenarios, the static analysis method quickly checks all test cases and fault-scenarios. The static analysis method makes approximations while performing the analysis, and any fault detected is reproduced using the simulation-based method. All analysis operations are performed on operations-level behavioral models of the applications, thereby reducing the cost of analysis.