Invention Grant
US08111569B2 Latch structure and bit line sense amplifier structure including the same 有权
锁存结构和位线检测放大器结构包括相同

Latch structure and bit line sense amplifier structure including the same
Abstract:
A latch structure includes a first inverter that includes a first PMOS transistor and a first NMOS transistor, and a second inverter that includes a second PMOS transistor and a second NMOS transistor, receives an output signal of the first inverter, and outputs an input signal to the first inverter. The sources of the first and second transistors of the same type are connected to a common straight source line.
Information query
Patent Agency Ranking
0/0