Invention Grant
- Patent Title: Tri-stating a phase locked loop to conserve power
- Patent Title (中): 三相锁相环以节省功率
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Application No.: US11467346Application Date: 2006-08-25
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Publication No.: US08112054B2Publication Date: 2012-02-07
- Inventor: Mark R. Gehring , Nathan Moyal
- Applicant: Mark R. Gehring , Nathan Moyal
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H04B1/06
- IPC: H04B1/06
Abstract:
In a system with an intermittently operating radio, the frequency of which is controlled by a Phase Locked Loop (PLL), a method and system for reducing the power consumed by the PLL by tri-stating the control capacitor in the PLL after the PLL has stabilized at a design frequency. After the capacitor is stabilized, power to some of the components in the PLL is reduced.
Public/Granted literature
- US20070082635A1 TRI-STATING A PHASE LOCKED LOOP TO CONSERVE POWER Public/Granted day:2007-04-12
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