发明授权
- 专利标题: Integrated circuit package having reduced interconnects
- 专利标题(中): 集成电路封装具有减少的互连
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申请号: US12710072申请日: 2010-02-22
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公开(公告)号: US08115269B2公开(公告)日: 2012-02-14
- 发明人: Warren M. Farnworth , Jerry M. Brooks
- 申请人: Warren M. Farnworth , Jerry M. Brooks
- 申请人地址: US NY Mt. Kisco
- 专利权人: Round Rock Research, LLC
- 当前专利权人: Round Rock Research, LLC
- 当前专利权人地址: US NY Mt. Kisco
- 代理机构: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- 主分类号: H01L31/075
- IPC分类号: H01L31/075 ; H01L31/105 ; H01L31/117
摘要:
A technique for making an integrated circuit package. Specifically, a stacked memory device is provided with minimal interconnects. Memory die are stacked on top of each other and electrically coupled to a substrate. Thru vias are provided in the substrate and/or memory die to facilitate the electrical connects without necessitating a complex interconnect technology between each of the interfaces. Wire bonds are used to complete the circuit package.
公开/授权文献
- US20100148372A1 INTEGRATED CIRCUIT PACKAGE HAVING REDUCED INTERCONNECTS 公开/授权日:2010-06-17
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