Invention Grant
- Patent Title: Integrated circuit packaging system with interconnect and method of manufacture thereof
- Patent Title (中): 具有互连的集成电路封装系统及其制造方法
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Application No.: US12633789Application Date: 2009-12-08
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Publication No.: US08115293B2Publication Date: 2012-02-14
- Inventor: DongSoo Moon , Taewoo Lee , Soo-San Park , SooMoon Park , Sang-Ho Lee
- Applicant: DongSoo Moon , Taewoo Lee , Soo-San Park , SooMoon Park , Sang-Ho Lee
- Applicant Address: SG Singapore
- Assignee: Stats Chippac Ltd.
- Current Assignee: Stats Chippac Ltd.
- Current Assignee Address: SG Singapore
- Agency: Mikio Ishimaru
- Main IPC: H01L21/60
- IPC: H01L21/60

Abstract:
A method of manufacture of an integrated circuit packaging system includes: providing a first substrate; mounting a component over the first substrate; mounting a stack substrate over the component, the stack substrate having an inner pad and an outer pad connected to the first substrate; mounting a first exposed interconnect on the outer pad; forming a first encapsulation over the stack substrate, the first exposed interconnect partially exposed and the inner pad partially exposed in a recess of the first encapsulation; and mounting a second exposed interconnect on the inner pad.
Public/Granted literature
- US20110133325A1 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2011-06-09
Information query
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