发明授权
- 专利标题： Method for fabricating semiconductor device with damascene bit line
- 专利标题（中）： 用镶嵌位线制造半导体器件的方法
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申请号： US12980902申请日： 2010-12-29
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公开(公告)号： US08119512B1公开(公告)日： 2012-02-21
- 发明人: Chang-Goo Lee
- 申请人： Chang-Goo Lee
- 申请人地址： KR Gyeonggi-do
- 专利权人： Hynix Semiconductor Inc.
- 当前专利权人： Hynix Semiconductor Inc.
- 当前专利权人地址： KR Gyeonggi-do
- 代理机构： IP & T Group LLP
- 优先权： KR10-2010-0125516 20101209
- 主分类号： H01L21/44
- IPC分类号： H01L21/44
摘要：
A method for fabricating a semiconductor device includes forming an interlayer dielectric layer over a substrate; forming a dual storage node contact plug to be buried in the interlayer dielectric layer, forming a first damascene pattern to isolate the dual storage node contact plug, forming a protective layer pattern inside the first damascene pattern, etching the interlayer dielectric layer to form a second damascene pattern to be coupled to the first damascene pattern, and forming bit lines inside the first and second damascene patterns.
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