Invention Grant
- Patent Title: Semiconductor device with improved trenches
- Patent Title (中): 具有改善沟槽的半导体器件
-
Application No.: US12940364Application Date: 2010-11-05
-
Publication No.: US08120075B1Publication Date: 2012-02-21
- Inventor: Yuhao Luo , Deepak Kumar Nayak
- Applicant: Yuhao Luo , Deepak Kumar Nayak
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent Michael T. Wallace; John J. King; Thomas George
- Main IPC: H01L29/80
- IPC: H01L29/80 ; H01L21/336
Abstract:
A semiconductor device exhibiting enhanced carrier mobility within a channel region of the semiconductor device is disclosed. The semiconductor device includes a gate stack having first and second sidewall spacers, where the gate stack is implemented above the channel region of the semiconductor device. The semiconductor device further includes first and second trenches formed adjacent to the gate stack, where the first and second trenches are conically shaped to be wider at a top portion of each trench as compared to a width of each trench below the top portion of each trench. The semiconductor device further includes strained silicon alloy formed within the first and second trenches, where a stress force exerted on the channel region of the semiconductor device is maximized at a surface of the semiconductor device below the gate stack.
Information query
IPC分类:
