Invention Grant
US08122387B2 Optimizing integrated circuit chip designs for optical proximity correction
有权
优化用于光学邻近校正的集成电路芯片设计
- Patent Title: Optimizing integrated circuit chip designs for optical proximity correction
- Patent Title (中): 优化用于光学邻近校正的集成电路芯片设计
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Application No.: US12482504Application Date: 2009-06-11
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Publication No.: US08122387B2Publication Date: 2012-02-21
- Inventor: Geng Han , Fook-Luen Heng , Jin Fuw Lee , Rama N. Singh
- Applicant: Geng Han , Fook-Luen Heng , Jin Fuw Lee , Chao Yi Tien, legal representative , Rama N. Singh
- Applicant Address: US NY Armonk
- Assignee: International Business Macines Corporation
- Current Assignee: International Business Macines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Law Office of Charles W. Peterson, Jr.
- Agent Preston J. Young, Esq.
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
A method of physical design for integrated circuit (IC) chip fabrication, physical design system and program product therefor. A design shape is fragmented into segments for Optical Proximity Correction (OPC) and a harmonic mean of the segments is determined. Electrical intent is determined for the shape and a harmonic mean is determined for the segments. Segments may be moved based on a effect on the harmonic mean from moving the segments, measured using a harmonic mean cost function. Finally segmented shapes are passed to OPC.
Public/Granted literature
- US20100318956A1 METHOD OF INTEGRATED CIRCUIT CHIP FABRICATION AND PROGRAM PRODUCT THEREFOR Public/Granted day:2010-12-16
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