Invention Grant
US08125267B2 Bias voltage generation to protect input/output (IO) circuits during a failsafe operation and a tolerant operation
有权
偏置电压产生,用于在故障安全操作和容错操作期间保护输入/输出(IO)电路
- Patent Title: Bias voltage generation to protect input/output (IO) circuits during a failsafe operation and a tolerant operation
- Patent Title (中): 偏置电压产生,用于在故障安全操作和容错操作期间保护输入/输出(IO)电路
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Application No.: US12889440Application Date: 2010-09-24
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Publication No.: US08125267B2Publication Date: 2012-02-28
- Inventor: Pankaj Kumar , Pramod E Parameswaran , Makeshwar Kothandaraman , Vani Deshpande , John Kriz
- Applicant: Pankaj Kumar , Pramod E Parameswaran , Makeshwar Kothandaraman , Vani Deshpande , John Kriz
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Agent Raj Abhyanker, P.C.
- Priority: KR10-2010-0008659 20100129; EP10152680 20100204
- Main IPC: G05F1/10
- IPC: G05F1/10

Abstract:
A method includes controllably generating a first bias voltage from a supply voltage to be within an upper tolerable limit of an operating voltage of one or more constituent active circuit element(s) of an Input/Output (IO) core device of an integrated circuit (IC) to be interfaced with an IO pad, and controllably generating a second bias voltage from an external voltage supplied through the IO pad to be within the upper tolerable limit of the operating voltage of the one or more constituent active circuit element(s) of the IO core device to be interfaced with the IO pad. The method also includes controllably utilizing a control signal generated by the IO core to derive an output bias voltage from the first bias voltage during a driver mode of operation or the second bias voltage during a failsafe mode of operation and a tolerant mode of operation.
Public/Granted literature
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