发明授权
US08130030B2 Interfacing between differing voltage level requirements in an integrated circuit system 有权
集成电路系统中不同电压等级要求之间的接口

Interfacing between differing voltage level requirements in an integrated circuit system
摘要:
A method includes controllably generating a first bias voltage from a supply voltage to be within an upper tolerable limit of an operating voltage of an IO receiver, and controllably generating a second bias voltage from an external voltage supplied through an IO pad to be within the upper tolerable limit of the operating voltage of the IO receiver. The method also includes deriving an output voltage from the first bias voltage during a normal condition and a tolerant condition, and deriving the output voltage from the second bias voltage during a failsafe condition. The tolerant condition is a mode of operation where the external voltage supplied through the IO pad varies from zero to a value higher than the supply voltage, and the failsafe condition is a mode of operation where the supply voltage is zero.
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