发明授权
US08130589B2 Semiconductor memory device using only single-channel transistor to apply voltage to selected word line
有权
半导体存储器件仅使用单通道晶体管对所选字线施加电压
- 专利标题： Semiconductor memory device using only single-channel transistor to apply voltage to selected word line
- 专利标题（中）： 半导体存储器件仅使用单通道晶体管对所选字线施加电压
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申请号： US13109694申请日： 2011-05-17
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公开(公告)号： US08130589B2公开(公告)日： 2012-03-06
- 发明人: Hiroshi Nakamura , Kenichi Imamiya
- 申请人： Hiroshi Nakamura , Kenichi Imamiya
- 申请人地址： JP Kawasaki-shi
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JP Kawasaki-shi
- 代理机构： Banner & Witcoff, Ltd.
- 优先权： JP2000-173715 20000609; JP2000-330972 20001030
- 主分类号： G11C8/00
- IPC分类号： G11C8/00
摘要：
A semiconductor memory device has a memory cell array, a first transistor of a first conductivity type, a second transistor of a second conductivity type and a third transistor of the first conductivity type. A source or drain of the first transistor is connected to each of word lines. A drain of the second transistor is connected to a gate of the first transistor. A source of the third transistor is connected to the gate of the first transistor. The gates of the second transistor and the third transistor are not connected, a source of the second transistor is not connected to a drain of the third transistor, and the gate of the second transistor and the drain of the third transistor have different voltage levels corresponding to opposite logic levels each other.
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