发明授权
US08135916B1 Method and apparatus for hardware-configurable multi-policy coherence protocol
有权
用于硬件可配置的多策略一致性协议的方法和装置
- 专利标题： Method and apparatus for hardware-configurable multi-policy coherence protocol
- 专利标题（中）： 用于硬件可配置的多策略一致性协议的方法和装置
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申请号： US12416359申请日： 2009-04-01
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公开(公告)号： US08135916B1公开(公告)日： 2012-03-13
- 发明人: R. Frank O'Bleness , Sujat Jamil , David E. Miner , Joseph Delgross , Tom Hameenanttila , Jeffrey Kehl
- 申请人： R. Frank O'Bleness , Sujat Jamil , David E. Miner , Joseph Delgross , Tom Hameenanttila , Jeffrey Kehl
- 申请人地址： BM
- 专利权人： Marvell International Ltd.
- 当前专利权人： Marvell International Ltd.
- 当前专利权人地址： BM
- 主分类号： G06F13/00
- IPC分类号： G06F13/00 ; G06F13/28
摘要：
A processor includes a first level of cache memory and a first set of instructions configured to implement a first cache coherency protocol. The processor also includes a second set of instructions configured to implement a second cache coherency protocol and a cache coherency protocol selector having at least two choice-states. The processor further includes a cache coherency implementer configured to implement the first cache coherency protocol or the second cache coherency with respect to the first level of cache memory based on a selected choice-state of the cache coherency protocol selector.
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