Invention Grant
- Patent Title: Barrier layer to prevent conductive anodic filaments
- Patent Title (中): 阻挡层防止导电阳极细丝
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Application No.: US12366017Application Date: 2009-02-05
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Publication No.: US08143532B2Publication Date: 2012-03-27
- Inventor: Leilei Zhang
- Applicant: Leilei Zhang
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent Scott Hewett; LeRoy D. Maunu; Lois D. Cartier
- Main IPC: H05K1/11
- IPC: H05K1/11
Abstract:
A through hole is formed in a circuit board that has fibers dispersed in a polymer matrix. Copper is sputtered within the through hole to form a sufficiently conductive layer for electrolytic plating over the sputtered copper layer.
Public/Granted literature
- US20100193229A1 BARRIER LAYER TO PREVENT CONDUCTIVE ANODIC FILAMENTS Public/Granted day:2010-08-05
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