发明授权
US08145059B2 Circuit topologies for high speed, low cost optical transceiver components 失效
高速,低成本光收发器组件的电路拓扑

  • 专利标题: Circuit topologies for high speed, low cost optical transceiver components
  • 专利标题(中): 高速,低成本光收发器组件的电路拓扑
  • 申请号: US12074239
    申请日: 2008-02-28
  • 公开(公告)号: US08145059B2
    公开(公告)日: 2012-03-27
  • 发明人: Ruai Yu
  • 申请人: Ruai Yu
  • 申请人地址: US CA Camarillo
  • 专利权人: GTran Corporation
  • 当前专利权人: GTran Corporation
  • 当前专利权人地址: US CA Camarillo
  • 代理机构: GSS Law Group
  • 主分类号: H04B10/00
  • IPC分类号: H04B10/00
Circuit topologies for high speed, low cost optical transceiver components
摘要:
A topology for optical transceiver components comprises an electrical signal interface stage, a data timing and signal reformatting stage, and an optical fiber interface stage. Unlike transceiver components known in the art, functions having signals with the most jitter are partitioned into the electrical signal interface stage. Data timing functions, for example retiming or clock and data recovery, are included in the data timing and reformatting stage. Output jitter from the data timing and signal reformatting stage is approximately equal to jitter in a clock signal, enabling use of semiconductor components having jitter greater than SONET limits and thereby increasing a value of production yield. Embodiments of the invention are well suited for 40 G transmitters and receivers in nonconnectorized surface mount packages. 40 G transceivers built in accord with the invention are expected to have lower cost, smaller size, and higher production yield than 40 G transceivers known in the art.
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