Invention Grant
- Patent Title: Stacked semiconductor package
- Patent Title (中): 堆叠半导体封装
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Application No.: US12491651Application Date: 2009-06-25
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Publication No.: US08154135B2Publication Date: 2012-04-10
- Inventor: Jong Hoon Kim , Ho Young Son
- Applicant: Jong Hoon Kim , Ho Young Son
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2009-0031414 20090410
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L29/40

Abstract:
A stacked semiconductor package is presented which includes multiple semiconductor chips and through-electrodes. Each semiconductor chip has bonding pads formed on a first surface of the semiconductor chip and has a projection which projects from a portion of a second surface of the semiconductor chip. The first and second surfaces of the semiconductor chip face away from each other the first surface. The through-electrodes pass through the first surface and through the projection on the second surface.
Public/Granted literature
- US20100258936A1 STACKED SEMICONDUCTOR PACKAGE Public/Granted day:2010-10-14
Information query
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