An apparatus, memory device controller and method of controlling a memory device are provided. The example apparatus may include a bad block bitmap referencing unit configured to obtain bad block information from a bad block bitmap based on a given memory address, the given memory address being one of a logical memory address and a physical memory address corresponding to the logical memory address, the bad block information indicating whether a given memory block corresponding to the given memory address is a bad block and a memory mapping unit configured to obtain the physical memory address corresponding to the logical memory address, and configured to obtain a reserved physical memory address corresponding to the physical memory address if the bad block information indicates that the given memory block is a bad block. In an example, the apparatus may be embodied as a memory device controller including a flash translation layer (FTL).