发明授权
- 专利标题: Buffering architecture for packet injection and extraction in on-chip networks
- 专利标题(中): 片上网络中数据包注入和提取的缓冲架构
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申请号: US12291460申请日: 2008-11-10
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公开(公告)号: US08165120B2公开(公告)日: 2012-04-24
- 发明人: Giuseppe Maruccia , Riccardo Locatelli , Lorenzo Pieralisi , Marcello Coppola
- 申请人: Giuseppe Maruccia , Riccardo Locatelli , Lorenzo Pieralisi , Marcello Coppola
- 申请人地址: FR Grenoble
- 专利权人: STMicroelectronics (Grenoble) SAS
- 当前专利权人: STMicroelectronics (Grenoble) SAS
- 当前专利权人地址: FR Grenoble
- 优先权: EP07120600 20071113
- 主分类号: H04L12/56
- IPC分类号: H04L12/56
摘要:
This method for transferring data through a network on chip (NoC) between a first electronic device and a second electronic device, comprising: retrieving from the first device request packets comprising request control data for controlling data transfer and actual request data to be transferred; storing said request control and data to be transferred in memory means provided in an network interface (NI); and elaborating data packets to be transferred to the second device through said network, said data packets comprising a header and a payload elaborated from said control data and said actual data, respectively; The control data and the actual data to be transferred are stored in separate first and second memory means.
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