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US08170164B2 Transfer clocks for a multi-channel architecture 有权
传输多通道架构时钟

Transfer clocks for a multi-channel architecture
摘要:
A multi-channel architecture comprising a central facility that is under clock control of a central facility's clock signal, and a central transfer clock generator adapted for deriving a central transfer clock signal from the central facility's clock signal. The multi-channel architecture further comprises a set of n channels, with n being a natural number, wherein each channel is under clock control of one out of a plurality of clock signals. Each of the channels comprises a channel transfer clock generator adapted for deriving a channel transfer clock signal from a clock signal of the respective channel, wherein the central facility's clock signal and the clock signals of the channels comprise at least two different clock signals. The transfer clock period of the central transfer clock signal is substantially equal to each of the transfer clock periods of the channel transfer clock signals.
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