发明授权
US08170166B2 Methods and systems for combining timing signals for transmission over a serial interface
有权
用于组合定时信号以在串行接口上传输的方法和系统
- 专利标题: Methods and systems for combining timing signals for transmission over a serial interface
- 专利标题(中): 用于组合定时信号以在串行接口上传输的方法和系统
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申请号: US12392841申请日: 2009-02-25
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公开(公告)号: US08170166B2公开(公告)日: 2012-05-01
- 发明人: Kenneth E. Stebbings , Vivek Bhan , Daniel B. Schwartz
- 申请人: Kenneth E. Stebbings , Vivek Bhan , Daniel B. Schwartz
- 申请人地址: US TX Austin
- 专利权人: Freescale Semiconductor, Inc.
- 当前专利权人: Freescale Semiconductor, Inc.
- 当前专利权人地址: US TX Austin
- 代理机构: Ingrassia Fisher & Lorenz, PC
- 主分类号: H04L7/00
- IPC分类号: H04L7/00
摘要:
Apparatus, systems, and methods are provided for transmitting messages over a serial interface. A method comprises receiving a first signal at a first time and receiving a second signal at a second time, the second time being after the first time. If a difference between the second time and the first time is less than a threshold time period, the method comprises generating a first message that is representative of the first signal and the second signal and transmitting the first message over the serial interface. In accordance with one embodiment, the threshold time period is equal to one half of an interface acquisition delay time period associated with the serial interface.
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