Invention Grant
- Patent Title: Method for manufacturing an array substrate
- Patent Title (中): 阵列基板的制造方法
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Application No.: US12623497Application Date: 2009-11-23
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Publication No.: US08173498B2Publication Date: 2012-05-08
- Inventor: Hsiang-Lin Lin , Ching-Huan Lin , Chih-Hung Shih , Wei-Ming Huang
- Applicant: Hsiang-Lin Lin , Ching-Huan Lin , Chih-Hung Shih , Wei-Ming Huang
- Applicant Address: TW Hsinchu
- Assignee: AU Optronics Corp.
- Current Assignee: AU Optronics Corp.
- Current Assignee Address: TW Hsinchu
- Agency: Thomas|Kayden
- Priority: TW98117413A 20090526
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/84

Abstract:
A method for manufacturing an array substrate is provided, wherein a data line is composed of first and second segments connected by a contact pad. First and second insulation layers are disposed between the first segment of the data line and a shielding electrode. In addition, the first insulation layer is disposed between the second segment of the data line and a gate line in their overlapping area. Accordingly, the coupling effect between the conductive layers can be reduced. For example, the RC delay problem due to parasitic capacitance between the shielding electrode and the data line is solved. As a result of the design of the two insulator layers between the first segment of the data line and the shielding electrode, the shorting between the conductive layers can also be simultaneously solved and the product yield can be increased.
Public/Granted literature
- US20100301345A1 ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2010-12-02
Information query
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