An exemplary thin film transistor (TFT) substrate assembly includes a substrate, a plurality of gate lines disposed on an inner surface of the substrate, a plurality of data lines disposed insulated with the gate lines. The plurality of gate lines and the plurality of data lines define a plurality of pixel regions. Each pixel region includes a first switch element, a second switch element, a first pixel electrode, and a second pixel electrode. The first switch element and the second switch element are connected with a same gate line from the plurality of gate lines. The first pixel electrode is applied with data signals from a data line from the plurality of data lines via the first switch element. The second pixel electrode is applied with data signals from the data line from the plurality of data lines via the second switch element and a voltage dividing element.