Invention Grant
- Patent Title: Semiconductor device with alternately arranged P-type and N-type thin semiconductor layers and method for manufacturing the same
- Patent Title (中): 具有交替排列的P型和N型薄型半导体层的半导体器件及其制造方法
-
Application No.: US12832963Application Date: 2010-07-08
-
Publication No.: US08178409B2Publication Date: 2012-05-15
- Inventor: Shengan Xiao , Feng Han
- Applicant: Shengan Xiao , Feng Han
- Applicant Address: CN Shanghai
- Assignee: Shanghai Hua Hong Nec Electronics Company, Limited
- Current Assignee: Shanghai Hua Hong Nec Electronics Company, Limited
- Current Assignee Address: CN Shanghai
- Agency: Rabin & Berdo, P.C.
- Priority: CN200910057581 20090709
- Main IPC: H01L29/15
- IPC: H01L29/15 ; H01L21/336
Abstract:
The invention is related to a semiconductor device with alternately arranged P-type and N-type thin semiconductor layers and method for manufacturing the same. For P-type device, the method includes trench formation, thermal oxide formation on trench sidewalls, N-type silicon formation in trenches, N-type impurity diffusion through thermal oxide into P-type epitaxial layer, oxidation of N-type silicon in trenches and oxide removal. In the semiconductor device, N-type thin semiconductor layers are formed by N-type impurity diffusion through oxide to P-type epitaxial layers, and trenches are filled with oxide. With this method, relatively low concentration impurity in high voltage device can be realized by current mass production process, and the device development cost and manufacturing cost are decreased.
Public/Granted literature
Information query
IPC分类:
