Invention Grant
US08179887B1 Method and apparatus for improving performance of TDM sequencing for packet processing engines using a delay line
有权
用于提高使用延迟线的分组处理引擎的TDM排序性能的方法和装置
- Patent Title: Method and apparatus for improving performance of TDM sequencing for packet processing engines using a delay line
- Patent Title (中): 用于提高使用延迟线的分组处理引擎的TDM排序性能的方法和装置
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Application No.: US12024806Application Date: 2008-02-01
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Publication No.: US08179887B1Publication Date: 2012-05-15
- Inventor: Naveen K. Jain , Venkata Rangavajjhala
- Applicant: Naveen K. Jain , Venkata Rangavajjhala
- Applicant Address: US IL Naperville
- Assignee: Tellabs Operations, Inc.
- Current Assignee: Tellabs Operations, Inc.
- Current Assignee Address: US IL Naperville
- Agency: JW Law Group
- Agent James M Wu
- Main IPC: H04Q11/04
- IPC: H04Q11/04

Abstract:
A network system, having an array of processing engines (“PEs”) and a delay line, improves packet processing performance for time division multiplexing (“TDM”) sequencing of PEs. The system includes an ingress circuit, a delay line, a demultiplexer, a tag memory, and a multiplexer. After the ingress circuit receives a packet from an input port, the delay line stores the packet together with a unique tag value. The delay line, in one embodiment, provides a predefined time delay for the packet. Once the demultiplexer forwards the packet to an array of PEs for packet processing, a tag memory stores the tag value indexed by PE number. The PE number identifies a PE in the array, which was assigned to process the packet. The multiplexer is capable of multiplex packets from PE array and replacing the packet with the processed packet in the delay line in response to the tag value.
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