发明授权
US08179972B2 Image encoding device, image decoding device, and integrated circuit used therein
有权
图像编码装置,图像解码装置及其中使用的集成电路
- 专利标题: Image encoding device, image decoding device, and integrated circuit used therein
- 专利标题(中): 图像编码装置,图像解码装置及其中使用的集成电路
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申请号: US11628733申请日: 2005-06-07
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公开(公告)号: US08179972B2公开(公告)日: 2012-05-15
- 发明人: Hidekatsu Ozeki , Masayasu Iguchi , Takahiro Nishi , Hiroaki Toida , Hiroto Tomita , Akihiko Inoue , Takashi Hashimoto
- 申请人: Hidekatsu Ozeki , Masayasu Iguchi , Takahiro Nishi , Hiroaki Toida , Hiroto Tomita , Akihiko Inoue , Takashi Hashimoto
- 申请人地址: JP Osaka
- 专利权人: Panasonic Corporation
- 当前专利权人: Panasonic Corporation
- 当前专利权人地址: JP Osaka
- 代理机构: Wenderoth Lind & Ponack, L.L.P.
- 优先权: JP2004-169726 20040608
- 国际申请: PCT/JP2005/010419 WO 20050607
- 国际公布: WO2005/122590 WO 20051222
- 主分类号: H04N7/12
- IPC分类号: H04N7/12
摘要:
An image decoding device and an encoding device include an arithmetic unit for performing arithmetic processing, an arithmetic data storage unit for storing an arithmetic result by the arithmetic unit, an input selection unit for selecting whether to read pixel data that is to be inputted to the arithmetic unit from compressed image data or from pixel data stored in the arithmetic data storage unit, and inputting the read pixel data to the arithmetic unit, and an arithmetic control unit for controlling, based on a transform mode used and the number of arithmetic operations in the arithmetic unit, a destination from which the pixel data that is to be inputted to the arithmetic unit by the input selection unit is read as well as a combination of pieces of pixel data targeted for the arithmetic processing by the arithmetic unit and multiplier coefficients for the arithmetic processing.
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