Invention Grant
US08184455B2 Power adapter having power factor correction circuit, switch voltage regulation circuit and voltage stabilization circuit controlled by feedback signal 有权
电源适配器具有功率因数校正电路,开关电压调节电路和稳压电路由反馈信号控制

  • Patent Title: Power adapter having power factor correction circuit, switch voltage regulation circuit and voltage stabilization circuit controlled by feedback signal
  • Patent Title (中): 电源适配器具有功率因数校正电路,开关电压调节电路和稳压电路由反馈信号控制
  • Application No.: US12346356
    Application Date: 2008-12-30
  • Publication No.: US08184455B2
    Publication Date: 2012-05-22
  • Inventor: Qiaoliang ChenMing XuYongjiang Bai
  • Applicant: Qiaoliang ChenMing XuYongjiang Bai
  • Applicant Address: TW Taoyuan, Taoyuan Hsien
  • Assignee: FSP Technology Inc.
  • Current Assignee: FSP Technology Inc.
  • Current Assignee Address: TW Taoyuan, Taoyuan Hsien
  • Agent Winston Hsu; Scott Margo
  • Main IPC: H02M3/335
  • IPC: H02M3/335 H02M7/44 G05F5/00 H02M1/10
Power adapter having power factor correction circuit, switch voltage regulation circuit and voltage stabilization circuit controlled by feedback signal
Abstract:
A power adapter to receive at least one AC input power and transform to DC primary output power includes a power factor correction circuit to receive the AC input power and modulate to become a modulated power, an isolation voltage step-down circuit connecting to the power factor correction circuit to modulate the modulated power to a modulated lower voltage power, a switch voltage regulation circuit connecting to the isolation voltage step-down circuit to receive the modulated lower voltage power, and a voltage stabilization circuit connecting to the switch voltage regulation circuit. The switch voltage regulation circuit sets a determined output level and regulates the modulated lower voltage power to become a determined power at the determined output level. The voltage stabilization circuit modulates the determined power to become the primary output power and supplies the primary output power to a primary output end.
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