Invention Grant
US08189364B2 Charge retention structures and techniques for implementing charge controlled resistors in memory cells and arrays of memory
失效
用于在存储器单元和存储器阵列中实现电荷控制电阻的电荷保持结构和技术
- Patent Title: Charge retention structures and techniques for implementing charge controlled resistors in memory cells and arrays of memory
- Patent Title (中): 用于在存储器单元和存储器阵列中实现电荷控制电阻的电荷保持结构和技术
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Application No.: US12639925Application Date: 2009-12-16
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Publication No.: US08189364B2Publication Date: 2012-05-29
- Inventor: Sima Dimitrijev , Herbert Barry Harrison
- Applicant: Sima Dimitrijev , Herbert Barry Harrison
- Applicant Address: AU East Melbourne
- Assignee: Qs Semiconductor Australia Pty Ltd.
- Current Assignee: Qs Semiconductor Australia Pty Ltd.
- Current Assignee Address: AU East Melbourne
- Agency: Kokka & Backus, P.C.
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
Embodiments of the invention relate generally to semiconductors and semiconductor fabrication techniques, and more particularly, to devices, integrated circuits, memory cells and arrays, and methods to use silicon carbide structures to retain amounts of charge indicative of a resistive state in, for example, a charge-controlled resistor of a memory cell. In some embodiments, a memory cell comprises a silicon carbide structure including a charge reservoir configured to store an amount of charge carriers constituting a charge cloud. The amount of charge carriers in the charge cloud can represent a data value. Further, the memory cell includes a resistive element in communication with the charge reservoir and is configured to provide a resistance as a function of the amount of charge carriers in the charge reservoir. The charge reservoir is configured to modulate the size of the charge cloud to change the data value.
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