A semiconductor memory device comprises a memory cell array having memory cells including a plurality of memory cells, and also comprises a first bit line, a first sense amplifier circuit and a control circuit. A signal is read out from a selected memory cell of the memory cell array through the first bit line. The first sense amplifier circuit has a single-ended configuration and includes an amplifying element amplifying a signal voltage of the first bit line so as to convert the signal voltage into an output current. The control circuit controls a test operation to measure a current flowing in the first sense amplifier circuit independently of currents flowing in other circuit portions.