Method for fabricating semiconductor structure

Invention Grant

US08193050B2 Method for fabricating semiconductor structure 有权

Title translation: 半导体结构的制造方法

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Patent Title: Method for fabricating semiconductor structure
Patent Title (中): 半导体结构的制造方法
Application No.: US12907016

Application Date: 2010-10-18
Publication No.: US08193050B2

Publication Date: 2012-06-05
Inventor: Chih-Hao Yu , Li-Wei Cheng , Che-Hua Hsu , Tian-Fu Chiang , Cheng-Hsien Chou , Chien-Ming Lai , Yi-Wen Chen , Chien-Ting Lin , Guang-Hwa Ma
Applicant: Chih-Hao Yu , Li-Wei Cheng , Che-Hua Hsu , Tian-Fu Chiang , Cheng-Hsien Chou , Chien-Ming Lai , Yi-Wen Chen , Chien-Ting Lin , Guang-Hwa Ma
Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
Assignee: United Microelectronics Corp.
Current Assignee: United Microelectronics Corp.
Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
Agent Winston Hsu; Scott Margo
Main IPC: H01L21/8238
IPC: H01L21/8238

Method for fabricating semiconductor structure

Abstract:

A method for fabricating a semiconductor structure is disclosed. A substrate with a first transistor having a first dummy gate and a second transistor having a second dummy gate is provided. The conductive types of the first transistor and the second transistor are different. The first and second dummy gates are simultaneously removed to form respective first and second openings. A high-k dielectric layer, a second type conductive layer and a first low resistance conductive layer are formed on the substrate and fill in the first and second openings, with the first low resistance conductive layer filling up the second opening. The first low resistance conductive layer and the second type conductive layer in the first opening are removed. A first type conductive layer and a second low resistance conductive layer are then formed in the first opening, with the second low resistance conductive layer filling up the first opening.

Abstract(Chinese):

公开了一种制造半导体结构的方法。提供具有第一晶体管的衬底，其具有第一虚拟栅极和具有第二虚拟栅极的第二晶体管。第一晶体管和第二晶体管的导电类型不同。同时去除第一和第二伪栅极以形成相应的第一和第二开口。在基板上形成高k电介质层，第二导电层和第一低电阻导电层，并填充第一和第二开口，第一低电阻导电层填充第二开口。第一开口中的第一低电阻导电层和第二导电层被去除。然后在第一开口中形成第一导电层和第二低电阻导电层，第二低电阻导电层填充第一开口。

Public/Granted literature

US20110034019A1 METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURE Public/Granted day:2011-02-10

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS