发明授权
US08193798B1 Buck regulators with adjustable clock frequency to achieve dropout voltage reduction 有权
降压稳压​​器可调节时钟频率,实现压降降压

Buck regulators with adjustable clock frequency to achieve dropout voltage reduction
摘要:
A method includes generating a drive signal for a transistor in a switching regulator. The drive signal turns the transistor on and off to generate a regulated output voltage. The drive signal is generated based on a clock signal. The method also includes dynamically decreasing a frequency of the clock signal to decrease a dropout voltage of the switching regulator. Dynamically decreasing the frequency of the clock signal can increase a duration of switching periods defined by the clock signal. The dropout voltage could have a first value proportional to TOFF—MIN/TON—MAX during shorter switching periods and a second value proportional to TOFF—MIN/TON—MAX—DFC during longer switching periods. TOFF—MIN represents a minimum amount of off-time for the transistor during each switching period, TON—MAX represents a maximum amount of on-time for the transistor during shorter switching periods, and TON—MAX—DFC represent a maximum amount of on-time for the transistor during longer switching periods.
信息查询
0/0