发明授权
US08194761B2 Sample clock frequency offset estimation in DRM 有权
DRM中采样时钟频率偏移估计

  • 专利标题: Sample clock frequency offset estimation in DRM
  • 专利标题(中): DRM中采样时钟频率偏移估计
  • 申请号: US12079937
    申请日: 2008-03-28
  • 公开(公告)号: US08194761B2
    公开(公告)日: 2012-06-05
  • 发明人: Yan Liu
  • 申请人: Yan Liu
  • 申请人地址: CN Shenzhen
  • 专利权人: Shenzhen STS Microelectronics Co.
  • 当前专利权人: Shenzhen STS Microelectronics Co.
  • 当前专利权人地址: CN Shenzhen
  • 优先权: CN200710089038 20070329
  • 主分类号: H04L27/28
  • IPC分类号: H04L27/28
Sample clock frequency offset estimation in DRM
摘要:
A system and method for estimating sample clock frequency offset (εs) in a digital radio mondiale (DRM) system such as, for example, DRM receivers. The system and method includes using a relationship given by the following equation: ɛ s = linearfit ( angle ⁢ ( P G m P G ⁢ _ ⁢ tr m P G m ⁢ - ⁢ cycle P G ⁢ _ ⁢ tr m ⁢ - ⁢ cycle ) , l ) × N 2 ⁢ π × cycle × ( N + L ) wherein the PGm is the gain pilot received in the mth symbol and PG—trm is the gain pilot transmitted in the mth symbol, the PGm-cycle is the gain pilot received in (m-cycle)th symbol, the PG—trm-cycle is the second gain pilot transmitted in (m-cycle)th symbol, the l is the index of the sub-carrier associated with the gain pilot, the N is a factor of a sample point number of a useful symbol, the L is a sample point number of a guard interval, and the cycle is the interval of two symbols which are inserted gain pilots at the same sub-carriers (l).
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