发明授权
US08202778B2 Patterning a gate stack of a non-volatile memory (NVM) with simultaneous etch in non-NVM area
有权
在非NVM区域中同时蚀刻非易失性存储器（NVM）的栅极堆叠图案化
- 专利标题： Patterning a gate stack of a non-volatile memory (NVM) with simultaneous etch in non-NVM area
- 专利标题（中）： 在非NVM区域中同时蚀刻非易失性存储器（NVM）的栅极堆叠图案化
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申请号： US12872073申请日： 2010-08-31
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公开(公告)号： US08202778B2公开(公告)日： 2012-06-19
- 发明人: Mehul D. Shroff
- 申请人： Mehul D. Shroff
- 申请人地址： US TX Austin
- 专利权人： Freescale Semiconductor, Inc.
- 当前专利权人： Freescale Semiconductor, Inc.
- 当前专利权人地址： US TX Austin
- 代理商 James L. Clingan, Jr.; Joanna G. Chiu
- 主分类号： H01L21/336
- IPC分类号： H01L21/336 ; H01L21/4763 ; H01L21/3205
摘要：
Forming a gate stack of a non-volatile memory (NVM) over a substrate having an NVM region and non-NVM region which does not overlap the NVM region includes forming a select gate layer over the substrate in the NVM and non-NVM regions; simultaneously etching the select gate layer in the NVM and non-NVM regions; forming a charge storage layer over the substrate in the NVM and non-NVM regions; forming a control gate layer over the charge storage layer in the NVM and non-NVM regions; and simultaneously etching the charge storage layer in the NVM and the non-NVM regions. Etching the select gate layer in the NVM region results in a portion of the charge storage layer over a portion of the select gate layer and overlapping a sidewall of the select gate layer and results in a portion of the control gate layer over the portion of the charge storage layer.
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