Invention Grant
US08207766B2 Method and apparatus for quantization noise reduction in fractional-N PLLs
有权
分数N PLL中量化噪声降低的方法和装置
- Patent Title: Method and apparatus for quantization noise reduction in fractional-N PLLs
- Patent Title (中): 分数N PLL中量化噪声降低的方法和装置
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Application No.: US12732029Application Date: 2010-03-25
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Publication No.: US08207766B2Publication Date: 2012-06-26
- Inventor: Qicheng Yu
- Applicant: Qicheng Yu
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: Zagorin O'Brien Graham LLP
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
A first current source supplies a first charge amount responsive to a first pulse signal from the phase frequency detector and a second current source supplies a second charge amount according to a fixed value and a variable value. The variable value corresponds to a phase difference between a first feedback clock signal and a hypothesized feedback clock signal with reduced quantization noise. The first and second charge amounts are of opposite polarity. A single set of first and second current sources perform the functions of charge pump and noise reduction DAC.
Public/Granted literature
- US20110234269A1 METHOD AND APPARATUS FOR QUANTIZATION NOISE REDUCTION IN FRACTIONAL-N PLLS Public/Granted day:2011-09-29
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