发明授权
- 专利标题： Semiconductor device having multi-layered wiring layer and fabrication process thereof
- 专利标题（中）： 具有多层布线层的半导体器件及其制造方法
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申请号： US12873570申请日： 2010-09-01
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公开(公告)号： US08212356B2公开(公告)日： 2012-07-03
- 发明人: Yasuo Yamasaki
- 申请人： Yasuo Yamasaki
- 申请人地址： JP
- 专利权人： Seiko Epson Corporation
- 当前专利权人： Seiko Epson Corporation
- 当前专利权人地址： JP
- 代理机构： Harness, Dickey & Pierce, P.L.C.
- 优先权： JP2009-262166 20091117
- 主分类号： H01L23/498
- IPC分类号： H01L23/498 ; H01L21/68 ; H01L21/58
摘要：
A semiconductor device having a multi-layered wiring layer includes a semiconductor substrate, an electrode that is provided on the semiconductor substrate, an insulating film that is provided on the semiconductor substrate, the insulating film having an aperture at least partly overlapping the electrode, a resin bump that is provided on the insulating film, and the wiring layer that is electrically connected to the electrode and that includes a first conductive layer, an intermediate layer, and a second conductive layer. The first conductive layer is formed on the electrode and on the resin bump, the intermediate layer is formed on the first conductive layer, and the second conductive layer formed on the intermediate layer.
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