发明授权
- 专利标题: Cross-architecture execution optimization
- 专利标题(中): 跨架构执行优化
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申请号: US11343927申请日: 2006-01-31
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公开(公告)号: US08214191B2公开(公告)日: 2012-07-03
- 发明人: Bran Ferren , W. Daniel Hillis , William Henry Mangione-Smith , Nathan P. Myhrvold , Clarence T. Tegreene , Lowell L. Wood, Jr.
- 申请人: Bran Ferren , W. Daniel Hillis , William Henry Mangione-Smith , Nathan P. Myhrvold , Clarence T. Tegreene , Lowell L. Wood, Jr.
- 申请人地址: US WA Bellevue
- 专利权人: The Invention Science Fund I, LLC
- 当前专利权人: The Invention Science Fund I, LLC
- 当前专利权人地址: US WA Bellevue
- 主分类号: G06F9/45
- IPC分类号: G06F9/45
摘要:
Embodiments include a device, apparatus, and a method. A device includes an input circuit for receiving data corresponding to a runtime execution of a first instruction by a first processor having a first architecture. The device also includes a generator circuit for creating an execution-based optimization profile useable in an execution of a second instruction by a second processor having a second architecture.
公开/授权文献
- US20070050609A1 Cross-architecture execution optimization 公开/授权日:2007-03-01
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